Small-sized portable radio devices, as mobile phones, should consume so little energy as possible to lengthen the use time of the battery and to avoid heating problems. Furnishing a phone with plurality of additional activities contributes to giving rise to energy saving. Most important objects, from the point of energy saving, are naturally those, whose energy consumption is relatively high. The radio frequency amplifiers of the transmitter are such objects, especially. Energy losses inevitably occur in the amplifiers. If the transmitting power of a transmitter would be constant, it would be easy to design the amplifiers so that the energy losses would be relatively low. However, in mobile terminals the transmitting power is changeble, because it is intentionally tried to be set to a value that is just sufficient. Unnecessary high transmitting powers cause rise of noise level in a radio network, which is avoided, of course. The power control range may be even 50 dB. The problem in that case is keeping the dissipation power down when using low transmitting powers.
FIG. 1 shows an example of a radio transmitter as a block diagram and of a principle, known as such, how to affect the dissipation power of the amplifiers. The transmitter comprises, listed in the propagation direction of the signal to be transmitted, a modulator MOD, a variable gain amplifier VGA, a driver amplifier DRA, a matching filter MFI, a power amplifier PA, an antenna filter AFI of the transmitting side and an antenna ANT. Abbreviation VGA will be used for the said variable gain amplifier in this description as well as in the claims for briefness and clarity. The analogous converted parts I and Q of the signal to be transmitted and a carrier LO are led to the quadrature type modulator from a local oscillator. The VGA is joined to the bus of the radio device, through which bus the gain of the VGA and thus the transmitting power of the whole transmitter are set programmably. The power amplifier PA has a separate driver amplifier DRA, because placing the driver amplifier in the same integrated circuit with the power amplifier would result in temperature problems in the driver amplifier. The output power of the driver amplifier is already remarkably high, and should thus be taken into account in the energy saving arrangements.
The dissipation powers of the driver and power amplifiers are affected through their steady currents in FIG. 1. When the input signal level of the driver amplifier is at its height, the steady currents must be high enough so that it is possible to rise the output power of the power amplifier to a specified maximum value. When the level of the input signal lowers from its maximum value, the steady currents can be unchanged from the output power's point of view. However, in principle this means unnecessary losses inside the amplifiers. By lowering the steady currents these losses are reduced at the same time, because the products of the current and voltage of the internal components of an amplifier are reduced. The lower the level of the input signal is, the more there is room for decreasing the steady currents. The output power of the transmitter is determined by the gain of the VGA, as mentioned above. The VGA then indirectly has information about the transmitting power. This matter is utilized by including a bias current source 130 of the driver and power amplifiers into the VGA, the input signal of which source is the same as the gain control voltage set through the bus. When the gain is increasing, a bias current Ibias becomes higher and vice versa. Both the driver amplifier DRA and the power amplifier PA have a bias current of their own, which bias current determines the steady current in the amplifier.
FIG. 2 shows an example of variable gain amplifier VGA, including a known bias current source. The VGA 200 comprises an amplifier proper 210, control circuit 220 thereof and a bias current source 230. The amplifier proper 210 has a bipolar differential pair Q21–Q22. The emitters of these transistors are connected to a controllable signal current source 211, the second current terminal of which being connected to the ground. The collector of the first transistor Q21 is directly connected to the supply voltage Vs and the collector of the second transistor Q22 is connected to a driver amplifier DRA, which is not shown in FIG. 2. When the base currents of the transistors are not taken into account, the current iin of the current source 211 is the sum of the first collector current i1 and the second collector current iout. The signal current source 211 is controlled by the input signal vin of the amplifier. The second collector current iout is at the same time the output signal of the amplifier. The base of the first transistor Q21 is connected to a reference voltage Vr1 through a resistor R21 and the base of the second transistor Q22 is connected to the output of the control circuit 220 through a resistor R22.
The control circuit 220 comprises an operational amplifier A21, a feedback resistor R23 thereof and a second controllable current source 221. The non-inverting input of the operational amplifier is connected to a reference voltage Vr2 and the current source 221 is connected from the inverting input to the ground. The current source is controlled externally by the gain control signal VG. The direction of the source current IGT is towards the ground, in which case the output voltage of the control circuit VGT=Vr2+R23·IGT=Vr2+aVG, where a is a constant. When the output voltage of the control circuit is enhanced by the control signal VG, the current iout of the second transistor is enhanced and the current i1 of the first transistor is reduced the same amount. The current iin remains unchanged, whereupon the current gain GI becomes greater. The maximum value of the current gain is one, in which case the current iin of the current source 221 flows wholly through the second transistor Q22. By means of the control circuit also a temperature compensation of the gain can be implemented.
The bias current source 230 comprises an operational amplifier A22, to the non-inverting input of which the above-mentioned gain control voltage VG is fed. The output of the operational amplifier is connected to the gate of a n-channel fet Qb, and the source of the fet Qb is connected to the signal ground through a resistor R24. From the source of the fet there is also a feedback to the inverting input of the operational amplifier, which feedback forces the voltage over the resistor being equal to the control voltage VG. Thus the current ID flowing in the channel of the fet is equal to VG/R24. The drain of the fet Qb is connected to the output of the bias current source 230. Prerequisite of the fet current naturally is that the output is connected to the supply voltage through some way. Between the same output and the ground there is further connected a constant current source 231, the current of which is Ico. The output current, or the bias current Ibias, then is the sum of the currents ID and Ico. In FIG. 2 occurs only one bias current. The bias current is divided between the driver and power amplifiers or it controls a circuit that produces two bias currents. The current Ico is relatively low and it secures that the bias current never drops quite close to the zero. A very low bias current would cause the amplifier to change unstable.
In this description the reference “R” means both a resistance and a resistor (component), the resistance of which is R. The term “differential pair” refers in this description and in the claims to two transistors, the emitters of which are connected together. The total emitter current is then divided between the transistors in a certain ratio depending on the control led to the bases.
A flaw of the above-described arrangement is, that the control of the losses of the driver amplifier and power amplifier is far from an optimal control. This is due to the fact that the bias current's dependence on the transmitter gain is very non-linear. Let us suppose an exemplary situation, that the transmitting power has to be dropped 40 dB from its maximum value. This corresponds to decreasing the current gain GI to the hundredth part. In the VGA of FIG. 2 the decreasing of the current gain to the hundredth part, from the value 0.99 to the value 0.01, takes place when the control voltage VG is lowered e.g. to the half, in which case the ratio of the control voltage is two. An accurate value depends on detailed implementation of the circuit, mainly on the selection of the reference voltages. In any case the ratio of the control voltage is much smaller than the ratio of the gain. The bias current of the driver and power amplifiers and therefore also the steady currents of these amplifiers decrease about in the same ratio as the control voltage VG. In the above-mentioned example the steady currents decrease to the half, altough there would be room for almost double decreasing, e.g. about to the hundredth parts of the original values. Correspondingly one half of the losses of the amplifiers fails to cut.